Gadget:Gen-X

Getting Started

• Both displays show logos, but only display B is responsive.

Startup

• On hard-reset, the FPGA copies the first 64k of flash to $0.
• Post-upload reset leaves that block alone, so you can upload code there.

Memory

• MOVE16 presently only works with the SRAM in the first 4BM.
  • This basically means you can't cache anything anywhere else.
  • TODO: test burst mode from the flash (ie can cache and/or keep MMU tables here?)
• Stef says to avoid using the DRAM for now.

I/O

• Power and SD Card LED control bits at GAVIN:0000 (feca) don't appear to work.
• I can't seem to get the LFSR to work.
• The I/O space should be marked as serialized/no-cache (defaults to unserialized -- reads can get ahead of writes).

vasm

• The 68040 MOVEC cache and MMU control registers are there, but typically without the last letter (R for Register).