| Start Address
|
Stop Address
|
Register Description
|
Additional Info
|
| $AF:0420 |
$AF:0420 |
SDMA_CTRL_REG0 |
SDMA control register 0
| Bit
|
Name
|
Purpose
|
| $01 |
SDMA_CTRL0_Enable |
Enable the SDMA block
|
| $02 |
SDMA_CTRL0_1D_2D |
0 - 1D (Linear) Transfer , 1 - 2D (Block) Transfer
|
| $04 |
SDMA_CTRL0_TRF_Fill |
Set to 1 to Enable the Generation of Interrupt when the Transfer is over.
|
| $08 |
SDMA_CTRL0_Int_Enable |
0 - Transfer Src -> Dst, 1 - Fill Destination with "Byte2Write"
|
| $10 |
SDMA_CTRL0_SysRAM_Src |
Set to 1 to Indicate that the Source is the System Ram Memory
|
| $20 |
SDMA_CTRL0_SysRAM_Dst |
Set to 1 to Indicate that the Destination is the System Ram Memory
|
| $80 |
SDMA_CTRL0_Start_TRF |
Set to 1 to start the transfer.
|
|
| $AF:0421 |
$AF:0421 |
SDMA_CTRL_REG1 |
System DMA Control Register 1
|
| $AF:0422 |
$AF:0422 |
SDMA_SRC_ADDY_L |
24-bit address of the source (if system RAM is the source)
|
| $AF:0423 |
$AF:0423 |
SDMA_SRC_ADDY_M
|
| $AF:0424 |
$AF:0424 |
SDMA_SRC_ADDY_H
|
| $AF:0425 |
$AF:0425 |
SDMA_DST_ADDY_L |
24-bit address of the destination (if system RAM is the destination)
|
| $AF:0426 |
$AF:0426 |
SDMA_DST_ADDY_M
|
| $AF:0427 |
$AF:0427 |
SDMA_DST_ADDY_H
|
| $AF:0428 |
$AF:0428 |
SDMA_SIZE_L / SDMA_X_SIZE_L |
If 1D transfer, the size of the transfer in bytes (24-bits). If 2D transfer, the 16-bit width of the block.
|
| $AF:0429 |
$AF:0429 |
SDMA_SIZE_M / SDMA_X_SIZE_H
|
| $AF:042A |
$AF:042A |
SDMA_SIZE_H / SDMA_Y_SIZE_L |
If 2D transfer, the 16-bit height of the block.
|
| $AF:042B |
$AF:042B |
Ignored / SDMA_Y_SIZE_H
|
| $AF:042C |
$AF:042C |
SDMA_SRC_STRIDE_L |
If 2D transfer, the number of bytes per row in the over-all source image.
|
| $AF:042D |
$AF:042D |
SDMA_SRC_STRIDE_H
|
| $AF:042E |
$AF:042E |
SDMA_DST_STRIDE_L
|
| $AF:042F |
$AF:042F |
SDMA_DST_STRIDE_H |
If 2D transfer, the number of bytes per row in the over-all destination image.
|
| $AF:0430 |
$AF:0430 |
SDMA_STATUS_REG / SDMA_BYTE_2_WRITE |
On write, the byte to write to memory.
On read, the status of the SDMA:
| Bit
|
Name
|
Purpose
|
| $01 |
SDMA_STAT_Size_Err |
If Set to 1, Overall Size is Invalid
|
| $02 |
SDMA_STAT_Dst_Add_Err |
If Set to 1, Destination Address Invalid
|
| $04 |
SDMA_STAT_Src_Add_Err |
If Set to 1, Source Address Invalid
|
| $08 |
SDMA_STAT_TimeOut_Err |
If Set to 1, a timeout occurred when transferring between data from and to VRAM
|
|
