Ports and Connectors

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Revision as of 11:44, 15 February 2020 by Gadget (talk | contribs) (Internal)
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Front Panel

RCA Line In

These are standard RCA Line-In jacks, 2v P-P nominal.

Headphone Jack

Standard 1/8" stereo headphone jack.

SD Card

Standard SD Card slot using custom controller logic instantiated on an FPGA.

Joystick Ports

The joystick ports, from left to right, are numbered 1,2,3,4.

  • Ports 1 and 2 may be electrically configured as 12 bit (S)NES style ports or as TTL ports.
  • Ports 2 and 4 are ATARI/C64 style ports and include analog inputs.
DB9 1&2 (S)NES 1&2 TTL 3&4 ATARI/C64
1 ignored UP UP
2 ignored DOWN DOWN
3 ignored LEFT LEFT
4 ignored RIGHT RIGHT
5 LATCH Button 1 POT-Y
6 DATA Button 0 BUTTON
7 +5 +5 +5
8 GND GND GND
9 CLK Button 2 POT-X

Reset Switch

"Power" LED

The power LED is under software control.

Rear Panel

Power Switch

Just an ordinary rocker switch.

Power

The power connector is a 12v center-positive 2.5mm barrel connector. The bare board should operate on as little as 500ma, but you should plan on more like 3A to cover adding a floppy drive, hard drive, etc.

PS/2 Keyboard and Mouse

PS/2 port 0 (Purple) -- nominal keyboard port PS/2 port 1 (Green) -- nominal mouse port

DVI-I

The Video connector is DVI with digital and analog output suitable for use with passive VGA and HDMI adaptors.

Parallel Port

IBM Standard DB25 EPP

Serial Port

IBM Standard DB9 RS232; all pins implemented.

MIDI

The port on the left (closest to the serial port) is MIDI OUT. The port on the right (closest to the RCA jacks) is MIDI IN.

Line Out

These are standard RCA Line-Out jacks, 2v P-P nominal.

Internal

J2 (Serial)

The 8-pin serial header follows the DTK/INTEL standard:

P2 (IDE)

Standard 44 Pin 2.5" laptop HDD IDC header.

J-TAG

Standard 10-pin J-TAG connector for reprogramming the FPGAs.

FLOPPY0 and FLOPPY1

FLOPPY0 and FLOPPY1 are electrically standard 3.5 inch micro Floppy Disk Drive connectors (26 pin flexfoil).

  • The internal drive is expected to be connected to FLOPPY0.

CN1

J-TAG interface for programming the TRINITY and UNITY FPGAs.