Difference between revisions of "Video DMA Block"
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(Created page with "{| class = "wikitable" ! Start Address ! Stop Address ! Register Description ! Additional Info |- | $AF:0400 || $AF:0400 || VDMA_CONTROL_REG || VDMA control register |- | $A...") |
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| $AF:0400 || $AF:0400 || VDMA_CONTROL_REG || VDMA control register | | $AF:0400 || $AF:0400 || VDMA_CONTROL_REG || VDMA control register | ||
+ | {| class = "wikitable" | ||
+ | ! Bit | ||
+ | ! Name | ||
+ | ! Purpose | ||
+ | |||
+ | |- | ||
+ | | VDMA_CTRL_Enable | $01 | Enabled the VDMA transfer block | ||
+ | |- | ||
+ | | VDMA_CTRL_1D_2D | $02 | 0 - 1D (Linear) Transfer, 1 - 2D (Block) Transfer | ||
+ | |||
+ | |||
+ | |} | ||
|- | |- | ||
| $AF:0401 || $AF:0401 || VDMA_STATUS_REG | | $AF:0401 || $AF:0401 || VDMA_STATUS_REG |
Revision as of 11:40, 18 January 2021
Start Address | Stop Address | Register Description | Additional Info | |||||
---|---|---|---|---|---|---|---|---|
$AF:0400 | $AF:0400 | VDMA_CONTROL_REG | VDMA control register
| |||||
$AF:0401 | $AF:0401 | VDMA_STATUS_REG | ||||||
$AF:0402 | $AF:0402 | VDMA_SRC_ADDY_L | 24-bit address of the source block (relative to start of video RAM) | |||||
$AF:0403 | $AF:0403 | VDMA_SRC_ADDY_M | ||||||
$AF:0404 | $AF:0404 | VDMA_SRC_ADDY_H | ||||||
$AF:0405 | $AF:0405 | VDMA_DST_ADDY_L | 24-bit address of the source block (relative to start of video RAM) | |||||
$AF:0406 | $AF:0406 | VDMA_DST_ADDY_M | ||||||
$AF:0407 | $AF:0407 | VDMA_DST_ADDY_H | ||||||
$AF:0408 | $AF:0408 | VDMA_SIZE_L / VDMA_X_SIZE_L | For 1-D DMA, 24-bit size of transfer in bytes. For 2-D, 16-bit width of block | |||||
$AF:0409 | $AF:0409 | VDMA_SIZE_M / VDMA_X_SIZE_H | ||||||
$AF:040A | $AF:040A | VDMA_SIZE_H / VDMA_Y_SIZE_L | For 2-D transfer, 16-bit height of block | |||||
$AF:040B | $AF:040B | VDMA_RESERVED_0 / VDMA_Y_SIZE_H | ||||||
$AF:040C | $AF:040C | VDMA_SRC_STRIDE_L | Number of bytes per row in a 2-D source block | |||||
$AF:040D | $AF:040D | VDMA_SRC_STRIDE_H | ||||||
$AF:040E | $AF:040E | VDMA_DST_STRIDE_L | Number of bytes per row in a 2-D destination block | |||||
$AF:040F | $AF:040F | VDMA_DST_STRIDE_H |