Difference between revisions of "Unity"
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Bzuidgeest (talk | contribs) (Created page with " Unity controls the hard-disk. Unity contains a "thin" layer to memory map the most important IDE/ATA registers to memory addresses. The table below was lifted from http://ww...") |
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| | Command block registers | Command block registers | | | | Command block registers | Command block registers | | ||
|-------------------------------+------------------------------------------+------------------------------------------| | |-------------------------------+------------------------------------------+------------------------------------------| | ||
| − | | A | N | 0 | 0 | 0 | Data | Data | $AFE830 | + | | A | N | 0 | 0 | 0 | Data | Data | $AFE830 (8-bit) | $AFE830 (8-bit) | |
| + | | | | $AFE838-39 (16-bit) | $AFE838-39 (16-bit)| | ||
| A | N | 0 | 0 | 1 | Error register | Features | $AFE831 | ???????? | | | A | N | 0 | 0 | 1 | Error register | Features | $AFE831 | ???????? | | ||
| A | N | 0 | 1 | 0 | Sector count | Sector count | $AFE832 | $AFE832 | | | A | N | 0 | 1 | 0 | Sector count | Sector count | $AFE832 | $AFE832 | | ||
Revision as of 11:15, 1 March 2020
Unity controls the hard-disk. Unity contains a "thin" layer to memory map the most important IDE/ATA registers to memory addresses. The table below was lifted from http://www.t13.org/Documents/UploadedDocuments/project/d0791r4c-ATA-1.pdf and then appended with the equivalent foenix registers on Unity.
Question marks are denoted at places where it is unknown if and where unity exposes the relevant register.
Hopefully this information is to some use for anyone trying to implement a hard-disk driver.
Logic conventions are: A = signal asserted;
N = signal negated;
x = does not matter which it is.
Table 6 - I/O port functions/selection addresses
+===============================-==========================================-==========================================+
| Addresses | Functions | Foenix Unity |
|-------------------------------+------------------------------------------+------------------------------------------|
| | | | | | READ (DIOR-) | WRITE (DIOW-) | READ | WRITE |
|CS1FX-|CS3FX-| DA2 | DA1 | DA0 |------------------------------------------|------------------------------------------|
| | | | | | Control block registers | Control block registers |
|------+------+-----+-----+-----+------------------------------------------+------------------------------------------|
| N | N | x | x | x | Data bus high imped | Not used | | |
| N | A | 0 | x | X | Data bus high imped | Not used | | |
| N | A | 1 | 0 | x | Data bus high imped | Not used | | |
| N | A | 1 | 1 | 0 | Alternate status | Device control | ???????????????? | ?????????????? |
| N | A | 1 | 1 | 1 | Drive address | Not used | ????????????? | |
|-------------------------------+------------------------------------------+------------------------------------------|
| | Command block registers | Command block registers |
|-------------------------------+------------------------------------------+------------------------------------------|
| A | N | 0 | 0 | 0 | Data | Data | $AFE830 (8-bit) | $AFE830 (8-bit) |
| | | $AFE838-39 (16-bit) | $AFE838-39 (16-bit)|
| A | N | 0 | 0 | 1 | Error register | Features | $AFE831 | ???????? |
| A | N | 0 | 1 | 0 | Sector count | Sector count | $AFE832 | $AFE832 |
| A | N | 0 | 1 | 1 | Sector number | Sector number | $AFE833 | $AFE833 |
| A | N | 0 | 1 | 1 | * LBA bits 0- 7 | * LBA bits 0- 7 | $AFE833 | $AFE833 |
| A | N | 1 | 0 | 0 | Cylinder low | Cylinder low | $AFE834 | $AFE834 |
| A | N | 1 | 0 | 0 | * LBA bits 8-15 | * LBA bits 8-15 | $AFE834 | $AFE834 |
| A | N | 1 | 0 | 1 | Cylinder high | Cylinder high | $AFE835 | $AFE835 |
| A | N | 1 | 0 | 1 | * LBA bits 16-23 | * LBA bits 16-23 | $AFE835 | $AFE835 |
| A | N | 1 | 1 | 0 | Drive/head | Drive/head | $AFE836 | $AFE836 |
| A | N | 1 | 1 | 0 | * LBA bits 24-27 | * LBA bits 24-27 | $AFE836 | $AFE836 |
| A | N | 1 | 1 | 1 | Status | Command | $AFE837 | $AFE837 |
| A | A | x | x | x | Invalid address | Invalid address | | |
|---------------------------------------------------------------------------------------------------------------------|
| * Mapping of registers in LBA mode |
+=====================================================================================================================+
