Difference between revisions of "Video DMA Block"
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|- | |- | ||
− | | | + | | $01 || VDMA_CTRL_Enable || Enabled the VDMA transfer block |
|- | |- | ||
− | | | + | | $02 || VDMA_CTRL_1D_2D || 0 - 1D (Linear) Transfer, 1 - 2D (Block) Transfer |
+ | |- | ||
+ | | $04 || VDMA_CTRL_TRF_Fill || 0 - Transfer Src -> Dst, 1 - Fill Destination with "Byte2Write" | ||
+ | |- | ||
+ | | $08 || VDMA_CTRL_Int_Enable || Set to 1 to Enable the Generation of Interrupt when the Transfer is over. | ||
+ | |- | ||
+ | | $10 || VDMA_CTRL_SysRAM_Src || Set to 1 to Indicate that the Source is the System Ram Memory | ||
+ | |- | ||
+ | | $20 || VDMA_CTRL_SysRAM_Dst || Set to 1 to Indicate that the Destination is the System Ram Memory | ||
+ | |- | ||
+ | | $80 || VDMA_CTRL_Start_TRF || Set to 1 To Begin Process, Need to Cleared before, you can start another | ||
+ | |} | ||
− | |||
|- | |- | ||
| $AF:0401 || $AF:0401 || VDMA_STATUS_REG | | $AF:0401 || $AF:0401 || VDMA_STATUS_REG |
Revision as of 11:42, 18 January 2021
Start Address | Stop Address | Register Description | Additional Info | ||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
$AF:0400 | $AF:0400 | VDMA_CONTROL_REG | VDMA control register
| ||||||||||||||||||||||||
$AF:0401 | $AF:0401 | VDMA_STATUS_REG | |||||||||||||||||||||||||
$AF:0402 | $AF:0402 | VDMA_SRC_ADDY_L | 24-bit address of the source block (relative to start of video RAM) | ||||||||||||||||||||||||
$AF:0403 | $AF:0403 | VDMA_SRC_ADDY_M | |||||||||||||||||||||||||
$AF:0404 | $AF:0404 | VDMA_SRC_ADDY_H | |||||||||||||||||||||||||
$AF:0405 | $AF:0405 | VDMA_DST_ADDY_L | 24-bit address of the source block (relative to start of video RAM) | ||||||||||||||||||||||||
$AF:0406 | $AF:0406 | VDMA_DST_ADDY_M | |||||||||||||||||||||||||
$AF:0407 | $AF:0407 | VDMA_DST_ADDY_H | |||||||||||||||||||||||||
$AF:0408 | $AF:0408 | VDMA_SIZE_L / VDMA_X_SIZE_L | For 1-D DMA, 24-bit size of transfer in bytes. For 2-D, 16-bit width of block | ||||||||||||||||||||||||
$AF:0409 | $AF:0409 | VDMA_SIZE_M / VDMA_X_SIZE_H | |||||||||||||||||||||||||
$AF:040A | $AF:040A | VDMA_SIZE_H / VDMA_Y_SIZE_L | For 2-D transfer, 16-bit height of block | ||||||||||||||||||||||||
$AF:040B | $AF:040B | VDMA_RESERVED_0 / VDMA_Y_SIZE_H | |||||||||||||||||||||||||
$AF:040C | $AF:040C | VDMA_SRC_STRIDE_L | Number of bytes per row in a 2-D source block | ||||||||||||||||||||||||
$AF:040D | $AF:040D | VDMA_SRC_STRIDE_H | |||||||||||||||||||||||||
$AF:040E | $AF:040E | VDMA_DST_STRIDE_L | Number of bytes per row in a 2-D destination block | ||||||||||||||||||||||||
$AF:040F | $AF:040F | VDMA_DST_STRIDE_H |