Difference between revisions of "Feature Status"
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{| class = "wikitable" | {| class = "wikitable" | ||
| − | | || '''[[A2560U]]''' || '''[[ | + | | || '''[[A2560U]]''' || '''[[FA2560K]]''' || '''[[A2560M]]''' || '''[[A2560M-Pro]]''' || '''[[A2560K]]''' || '''[[A2560X]]''' || '''[[Gen-X]]''' || '''[[Gen-X2]]''' || |
|- | |- | ||
| − | | Load || || | + | | Load || || MemtextAug30th || || || 0000011.00000 || || || || |
|- | |- | ||
| − | | | + | | EXT SID || N/A || N/A || N/A || N/A || || || || || |
|- | |- | ||
| − | | MMU || N/A || | + | | MMU || N/A || N/A || || || || || Working! || || |
|- | |- | ||
| − | | Cache || N/A || || || Working! || || | + | | Cache || N/A || N/A || || || || || Working! || || |
|- | |- | ||
| − | | | + | | DRAM || N/A || || || || 32-64 unstable || || Unusable || || |
|- | |- | ||
| − | | Ethernet || N/A || || | + | | Ethernet || N/A || || || || Working! || || Working! || || |
|- | |- | ||
| − | | | + | | RTC || || || Working! || || Working! || || Working! || || |
|- | |- | ||
| − | | | + | | INT HD || || || || || || || || || |
|- | |- | ||
| − | | | + | | EXT SDC || || || || || Working! || || Working! || || |
|- | |- | ||
| − | | WM8776 || || | + | | WM8776 || || || Working! || || || || || || |
|- | |- | ||
| − | | PSG || || | + | | PSG || || || Working! || || || || || || |
|- | |- | ||
| − | | INT SID || || | + | | INT SID || || || Working! || || || || || || |
|- | |- | ||
| − | | | + | | PS2 || || || Working! || || || || Inconsistent || || |
|- | |- | ||
| − | | | + | | MIDI || || || Working! || || || || || || |
|- | |- | ||
| − | | | + | | UARTs || || || Working! || || || || || || |
|- | |- | ||
| − | | | + | | MATH || Needs love || || || || || || working* || || |
| − | |||
| − | |||
|- | |- | ||
| VICKY | | VICKY | ||
|- | |- | ||
| − | | Text || || || || both work! || | + | | Text || || Working! || || || || || both work! || || |
|- | |- | ||
| − | | Bitmap || || | + | | Bitmap || || || || || || || Working! || || |
|- | |- | ||
| − | | Sprites || Not working || | + | | Sprites || Not working || || || || || || || || |
|- | |- | ||
| − | | Tiles || Not working || | + | | Tiles || Not working || || || || || || || || |
|} | |} | ||
* GenX MATH: NOPs needed for divide ops. With optimized caching and pipelining, the CPU's instructions are faster, b/c they don't need to schedule the bus. | * GenX MATH: NOPs needed for divide ops. With optimized caching and pipelining, the CPU's instructions are faster, b/c they don't need to schedule the bus. | ||
| + | * FA2560K TEXT: legacy mode works so long as you don't exceed 8k each of text/attributes; new mode not fully tested, but basics are working! | ||
| + | * 68040/68060: Even with caching disabled, you should still configure the I/O address region(s) for "serialized" access. Otherwise, the memory controller might re-order reads and writes on you! | ||
Latest revision as of 17:30, 24 October 2025
| A2560U | FA2560K | A2560M | A2560M-Pro | A2560K | A2560X | Gen-X | Gen-X2 | ||
| Load | MemtextAug30th | 0000011.00000 | |||||||
| EXT SID | N/A | N/A | N/A | N/A | |||||
| MMU | N/A | N/A | Working! | ||||||
| Cache | N/A | N/A | Working! | ||||||
| DRAM | N/A | 32-64 unstable | Unusable | ||||||
| Ethernet | N/A | Working! | Working! | ||||||
| RTC | Working! | Working! | Working! | ||||||
| INT HD | |||||||||
| EXT SDC | Working! | Working! | |||||||
| WM8776 | Working! | ||||||||
| PSG | Working! | ||||||||
| INT SID | Working! | ||||||||
| PS2 | Working! | Inconsistent | |||||||
| MIDI | Working! | ||||||||
| UARTs | Working! | ||||||||
| MATH | Needs love | working* | |||||||
| VICKY | |||||||||
| Text | Working! | both work! | |||||||
| Bitmap | Working! | ||||||||
| Sprites | Not working | ||||||||
| Tiles | Not working |
- GenX MATH: NOPs needed for divide ops. With optimized caching and pipelining, the CPU's instructions are faster, b/c they don't need to schedule the bus.
- FA2560K TEXT: legacy mode works so long as you don't exceed 8k each of text/attributes; new mode not fully tested, but basics are working!
- 68040/68060: Even with caching disabled, you should still configure the I/O address region(s) for "serialized" access. Otherwise, the memory controller might re-order reads and writes on you!
